DSD Lab

University of Tehran

School of Electrical and Computer Engineering

The Dependable Systems Design (DSD) group conducts research into the design and verification of low power, fault-tolerant and reliable VLSI systems, with particular emphasis on asynchronous circuit techniques and formal methods to achieve its goals.

 

Welcome to DSD lab

Our research at the Dependable Systems Design Lab spans a diverse and interdisciplinary range of domains at the intersection of hardware / software and intelligent systems. We develop advanced machine learning (ML) and deep machine learning (DML) algorithms for biomedical signal processing, focusing on the detection of ECG arrhythmias, sleep apnea, and the estimation of heart biological age.
In parallel, we investigate cutting-edge hardware security solutions, including the detection and prevention of hardware Trojans, logic locking techniques, and resilience against ML-based attacks on integrated circuits. Our team also explores AI-driven smart surveillance systems for real-time video monitoring and threat detection. In the automotive domain, we work on robust computer vision AI-based algorithms for self-driving cars, including object detection and multi-object tracking.
Additionally, we emphasize the design, verification and implementation of reliable and energy-efficient digital circuits to ensure high performance and low power consumption in modern embedded systems.

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Goals & Objectives

Identifying undesirable factors and their effects on the functionality of digital systems
Proposing methods to eliminate these factors in order to establish the main features of a dependable system which are availability, reliability and integrity
Implementing CAD tools which allow the high level specification and design of dependable and energy-efficient VLSI systems by using asynchronous techniques
Synthesis of low latency and low power design. Proposing algorithms and digital circuitries to achieve low power, high speed and dependable integrated circuits
Design of on-chip communication links using special encoding to achieve better power-reliability-performance and noise robustness
Ensuring that what we mean to design corresponds to the chip's actual behavior. This can be done through Functional and Formal Verification